Download ARM Assembly Language Programming by Peter J Cockerell PDF

By Peter J Cockerell

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However, circumstances often arise where several registers need to be saved (or loaded) at once. For example, a program might need to save the contents of R1 to R12 while these registers are used for some calculation, then load them back when the result has been obtained. The sequence: STR STR STR STR STR STR STR STR STR STR STR STR R1,[R0],#4 R2,[R0],#4 R3,[R0],#4 R4,[R0],#4 R5,[R0],#4 R6,[R0],#4 R7,[R0],#4 R8,[R0],#4 R9,[R0],#4 R10,[R0],#4 R11,[R0],#4 R12,[R0],#4 27 of 37 ARM Assembly Language Programming - Chapter 3 - The Instruction Set to save them is inefficient in terms of both space and time.

In an ARM program, the SP will almost invariably be stored in one of the general-purpose registers. g. R12 or R13 is used. The Acorn ARM Calling Standard, for example, specifies R12, whereas BASIC uses R13. Here is a pictorial representation of two items being pushed onto a stack. Before the items are pushed, SP points to (holds the address of) the previous item that was pushed. After two new words have been pushed, the stack pointer points to the second of these, and the first word pushed lies 'underneath' it.

VS Overflow set This condition is true if the result flag V (overflow) is set. Add, subtract and compare instructions affect the V flag. VC Overflow clear The opposite to VS. MI Minus Instructions with this condition only execute if the N (negative) flag is set. Such a condition would occur when the last data operation gave a result which was negative. That is, the N flag reflects the state of bit 31 of the result. ) PL Plus This is the opposite to the MI condition and instructions with the PL condition will only execute if the N flag is cleared.

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